Advanced Manufacturing
Semiconductor

Fab Throughput Ramp

Which tool constraint limits output, and what becomes the next limit after it is relieved?

Model map

The governing limit is highlighted

What governs output

Current qualified output

~10,500 wafers/month

Governing limit

Lithography fully loaded

First move: +10% lithography

Output rises to ~11,000/month

Situation

Wafer starts pass through lithography, metrology, and probe/test before they count as qualified output.

Model logic

Raises each tool constraint in turn and resolves the fab flow to find the first useful capacity move.

Constraint chain
01

More budget does not increase output while scanner capacity is fixed.

02

A 10% lithography increase raises qualified output to about 11,000 wafers/month.

03

Metrology becomes the next bottleneck after lithography is relieved.

Takeaway

Increase lithography capacity by 10% to reach about 11,000 wafers/month; plan metrology capacity next.